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ذاكرة انتقالية L2 - traduction vers Anglais
L2 Cache
![Austek]] A38202; to the right of the processor)](https://commons.wikimedia.org/wiki/Special:FilePath/Motherboard Intel 386.jpg?width=200 "Austek]] A38202; to the right of the processor)")
![[[Motherboard]] of a [[NeXTcube]] computer (1990). At the lower edge of the image left from the middle, there is the CPU [[Motorola 68040]] operated at 25 [[MHz]] with two separate level 1 caches of 4 KiB each on the chip, one for the instructions and one for data. The board has no external L2 cache.](https://commons.wikimedia.org/wiki/Special:FilePath/NeXTcube motherboard.jpg?width=200 "[[Motherboard]] of a [[NeXTcube]] computer (1990). At the lower edge of the image left from the middle, there is the CPU [[Motorola 68040]] operated at 25 [[MHz]] with two separate level 1 caches of 4 KiB each on the chip, one for the instructions and one for data. The board has no external L2 cache.")
computer storage
Définition
Wikipédia
In mathematics, L2 cohomology is a cohomology theory for smooth non-compact manifolds M with Riemannian metric. It is defined in the same way as de Rham cohomology except that one uses square-integrable differential forms. The notion of square-integrability makes sense because the metric on M gives rise to a norm on differential forms and a volume form.
L2 cohomology, which grew in part out of L2 d-bar estimates from the 1960s, was studied cohomologically, independently by Steven Zucker (1978) and Jeff Cheeger (1979). It is closely related to intersection cohomology; indeed, the results in the preceding cited works can be expressed in terms of intersection cohomology.
Another such result is the Zucker conjecture, which states that for a Hermitian locally symmetric variety the L2 cohomology is isomorphic to the intersection cohomology (with the middle perversity) of its Baily–Borel compactification (Zucker 1982). This was proved in different ways by Eduard Looijenga (1988) and by Leslie Saper and Mark Stern (1990).
